<p>The signal to be delayed is delivered to the first delay gate (1.1). There are n separating gates (3.1 to 3.n) which respectively receive the output signals of the delay gates (1.1 to 1.n). The associated separating gate output wirings (4.1 to 4.n) have their lengths sequentially reduced from the first to the nth one. The wiring first ends are each coupled to the outputs of the respective separating gates. An n:1 type of selector (150) is coupled to the signal output ends of wirings, allowing for the selection of an output signal from the chosen separating gate circuit, and its transmission to the output terminal (OUT).</p>
