发明名称 |
Ionizing dose hardness assurance technique for CMOS integrated circuits |
摘要 |
A method for testing IC devices for radiation hardness in a non-destructive manner, comprising subjecting a device under test (DUT) originally in an insensitized state, to a state in which the DUT is more sensitive to adverse effects of ionizing dose radiation and while the DUT is in the more sensitive state, subjecting the DUT to a low level of ionizing radiation to degrade performance of the DUT and electrical testing followed by a restoration of the DUT to its original insensitized state.
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申请公布号 |
US6476597(B1) |
申请公布日期 |
2002.11.05 |
申请号 |
US20000483893 |
申请日期 |
2000.01.18 |
申请人 |
FULL CIRCLE RESEARCH, INC. |
发明人 |
SPRATT JAMES P;LEADON ROLAND E. |
分类号 |
G01R31/00;(IPC1-7):G01R31/26 |
主分类号 |
G01R31/00 |
代理机构 |
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主权项 |
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地址 |
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