发明名称 ELECTROSTATIC DISCHARGE PROTECTIVE CIRCUIT
摘要 PROBLEM TO BE SOLVED: To provide an ESD protective circuit which is saved in space and also capable of effectively protecting an internal circuit against ESD. SOLUTION: When positive ESD is applied to a power supply terminal VDD, a PMOS 121 is turned-on only for a period of time determined by a time constant depending on a resistor 123 and a capacitor 124 to cause a gate voltage of an NMOS 111 to rise by a voltage generated across a resistor 122. This raises substrate potential, causing a parasitic bipolar transistor 111a of the NMOS 111 to be turned-on by a low-drain voltage. A current by the ESD flows via a power line 202 to the power supply terminal VSS, to have the internal circuit 200 protected. COPYRIGHT: (C)2005,JPO&NCIPI
申请公布号 JP2005235947(A) 申请公布日期 2005.09.02
申请号 JP20040041775 申请日期 2004.02.18
申请人 FUJITSU LTD 发明人 SAITO NORIAKI;HASHIMOTO KENJI
分类号 H01L27/04;H01L21/822;H01L23/60;H01L27/02;H01L29/78;H02H3/20;H02H9/00;(IPC1-7):H01L21/822 主分类号 H01L27/04
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