| 摘要 |
FIELD: automation and computer engineering. ^ SUBSTANCE: proposed AND gate (Fig. 3) that affords ternary logic function has binary logic NAND gates 12 and NOR gates 13 series-connected between positive voltage supply bus 2 and negative voltage supply bus 3 and built to CMOS technology; their inputs are connected to input buses 4, 5 and outputs 15, 16, to first and second inputs of integrating component 14, respectively; output of the latter is connected to load 7. Point of connection of supply leads of both gates is connected to common bus 1. ^ EFFECT: enhanced capacity of device, provision for its unification with binary logic integrated circuits. ^ 3 cl, 4 dwg, 8 tbl |
