| 摘要 |
A shift register and a driving method thereof are provided to extend the lifetime of the shift register by reducing the number of stages, which are simultaneously driven by the same start pulse. A first start pulse(SP1) from a pulse generator is input to a first stage(CST1). The first start pulse is input to gate terminals of first and third NMOS(Negative Metal Oxide Semiconductor) transistors(Tr1,Tr3), which are formed in the first stage. The first and third NMOS transistors are turned on, and a first source voltage(VDD) is applied on a first node(Q) through the third NMOS transistor. The first node is charged, so that an eleventh transistor(Tr11), whose gate terminal is connected to the charged first node, is turned on. A second source voltage(VSS) is supplied to a second node(QB) through the third transistor. The second node is discharged by the second source voltage and a twelfth transistor(Tr12), whose gate terminal is connected to the second node, is turned off.
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