发明名称
摘要 PURPOSE:To highly integrate a cache memory by using an internal cache memory with a second wiring layer as a high resistance load, and forming a memory cell composed of a first conductivity type metal oxide film semiconductor transistor. CONSTITUTION:A metal oxide film semiconductor field-effect transistor(MOSFET) is formed on a semiconductor substrate, and a wiring layer and an insulating layer are laminated thereon. A first wiring layer 81 of four wiring layers 81-84 constitutes a gate electrode of the MOSFET, and the second layer 82 is formed to have a high resistance of about several gigaohms of the same material as that of the layer 81. Further, the third and fourth layers 83, 84 can be connected to the layers 81, 82 through contact holes, and the third and fourth layers 83, 84 can be formed with a contact hole at an insulating film 90 formed therebetween to be connected. Thus, a high integration internal cache memory can be obtained.
申请公布号 JP2547122(B2) 申请公布日期 1996.10.23
申请号 JP19900324281 申请日期 1990.11.26
申请人 MITSUBISHI ELECTRIC CORP 发明人 SAITO JUICHI
分类号 G06F15/78;H01L27/10 主分类号 G06F15/78
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