METHODS OF FABRICATING MEMORY DEVICE WITH SPACED-APART SEMICONDUCTOR CHARGE STORAGE REGIONS

摘要

Methods of fabricating semiconductor devices, such as monolithic three-dimensional NAND memory string devices, include selectively forming semiconductor material charge storage regions over first material layers exposed on a sidewall of a front side opening extending through a stack comprising an alternating plurality of first and second material layers using a difference in incubation time for the semiconductor material on the first material relative to an incubation time for the semiconductor material on the second material of the stack. In other embodiments, a silicon layer is selectively deposited on silicon nitride on a surface having at least one first portion including silicon oxide and at least one second portion including silicon nitride using a difference in an incubation time for the silicon on silicon nitride relative to an incubation time for the silicon on silicon oxide.

主权项

1. A method of making a monolithic three dimensional NAND string, comprising:
forming a stack of alternating layers of a first material and a second material different than the first material over a substrate; etching the stack to form a front side opening in the stack having a sidewall defined at least partially by the alternating layers of the first material and the second material; removing a first portion of the second material layers through the front side opening to form front side recesses between the first material layers; forming vertically spaced apart charge storage regions comprising a semiconductor material within the front side recesses, wherein forming the vertically spaced apart charge storage regions comprises:
forming a first layer of the semiconductor material over the first material layers exposed on the sidewall of the front side opening and over the second material layers exposed within the front side recesses, wherein a thickness of the first layer of semiconductor material formed over the second material layers is greater than a thickness of the first layer of semiconductor material formed over the first material layers due to a difference in an incubation time for the semiconductor material on the first material relative to an incubation time for the semiconductor material on the second material; andetching through the front side opening to remove first portions of the semiconductor material from over the first material layers on the sidewall of the front side opening to leave vertically spaced apart second portions of the semiconductor material within the front side recesses; forming a tunnel dielectric layer over the charge storage regions in the front side opening; and forming a semiconductor channel over the tunnel dielectric layer in the front side opening.