INTEGRATED CIRCUIT HAVING SPARE CIRCUIT CELLS

摘要

Aspects of the disclosure include an integrated circuit that includes a plurality of functional circuit cells and a plurality of inactive spare functional circuit cells. Ones of the functional circuit cells respectively includes a set of first electrically interconnected transistors that define a first logic component and a first power rail configured to carry a first supply voltage. Ones of the inactive spare functional circuit cells respectively includes a set of second electrically interconnected transistors configured to define a second logic component and a second power rail configured to carry the first supply voltage. The set of electrically interconnected transistors is interconnected through a second set of conductive lines formed in the first conductive layer. The set of second electrically interconnected transistors is electrically disconnected from the second power rail.

主权项

1. An integrated circuit, comprising:
a plurality of functional circuit cells, ones of the functional circuit cells respectively including:
a set of first electrically interconnected transistors that define a first logic component, the set of first electrically interconnected transistors being interconnected through a first set of conductive lines formed in a first conductive layer of the integrated circuit; anda first power rail configured to carry a first supply voltage, the set of first electrically interconnected transistors being electrically coupled to the first power rail through an electrical interconnection formed in a second conductive layer of the integrated circuit; and a plurality of inactive spare functional circuit cells, ones of the inactive spare functional circuit cells respectively including:
a set of second electrically interconnected transistors configured to define a second logic component, the set of electrically interconnected transistors being interconnected through a second set of conductive lines formed in the first conductive layer; anda second power rail configured to carry the first supply voltage, the set of second electrically interconnected transistors being electrically disconnected from the second power rail.