| 摘要 |
PURPOSE:To evade difficulty regarding a circuit technology without making necessary a high speed PLL circuit, by using a low speed PLL circuit in a case of the recovery of a high speed carrier. CONSTITUTION:When a PSK signal to be modulated of n-phase having a frequency f1 is inputted to an input terminal 14, a signal of frequency f1X(n) from which a phase component is eliminated, can be obtained by passing through a multiplication circuit 1, a band-pass filter 2, a 4-multiplication circuit 3, a multiplication circuit 5, and a band-pass filter 6. And a signal of frequency (f1X(n))+ or -f2 is outputted by inputting a signal of frequency f1X(n), and a signal of frequency f2 in an oscillation circuit 11 to the first mixer 7, and by passing through a band-pass filter 8 which makes pass only a frequency f1X(n)-f2, a signal of frequency (F4d1X(n)-f2) can be obtained. By enabling a signal to convert from a high frequency of frequency f1X(n) to a low frequency of frequency f1X(n)-f2, and inputting the signal to a low speed PLL circuit 9, a signal of continuous frequency f1X(n)-f2 can be obtained. And by inputting it to the second mixer 10, a signal of frequency (f1X(n)F-f1)+ or -f2 can be obtained, and a frequency f1X(n) can be obtained, then the signal being inputted to a frequency division circuit 13. |
