发明名称 |
Memory control apparatus and method for controlling usage amounts for a plurality of cache memories |
摘要 |
A memory control apparatus interposed between a central processing unit and a memory device to store data includes a channel control unit to control a data transfer to/from the central processing unit; a drive control unit to control a data transfer to/from the memory device; a plurality of cache memories to temporarily store data which is transferred between the central processing unit and the memory device; and a cache memory control unit having a selector for selecting a cache memory to store data which is transferred from the memory device. The memory control apparatus selects a cache memory to which data is to be stored so as to almost equalize usage of the plurality of cache memories, thereby controlling allocation of the cache memories and enabling a cache memory space to be effectively used. |
申请公布号 |
US5987569(A) |
申请公布日期 |
1999.11.16 |
申请号 |
US19960601358 |
申请日期 |
1996.02.16 |
申请人 |
HITACHI, LTD. |
发明人 |
TAKAHASHI, MISAKO;ASAKA, YOSHIHIRO;KISHIRO, SHIGERU;YAMAMOTO, AKIRA |
分类号 |
G06F3/06;G06F11/10;G06F12/08;(IPC1-7):G06F13/00;G06F13/38 |
主分类号 |
G06F3/06 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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