Controlled frequency power factor correction circuit and method

摘要

A power factor correction (PFC) circuit ( 10 ) includes a latch ( 16 ) having an output that initiates a coil current (I_COIL) in response to a transition edge of a clock signal (CLOCK) to generate a PFC signal (V_OUT). An input receives a control signal (TERM). A current modulation circuit ( 14 ) has a first input ( 36 ) coupled for receiving the PFC signal to establish a charging time (T_CH) of the coil current. A second input senses the coil current to establish a duty cycle of the coil current over a period of the clock signal, and an output ( 38 ) provides the control signal as a function of the charging time and the duty cycle.