E-flash cell band engineering for erasing speed enhancement

摘要

The present disclosure relates to a structure and method for forming a flash memory cell with an improved erase speed and erase current. Si dots are used for charge trapping and an ONO sandwich structure is formed over the Si dots. Erase operation includes direct tunneling as well as FN tunneling which helps increase erase speed without compensating data retention.

主权项

1. A flash memory cell comprising:
a semiconductor substrate; a tunnel oxide layer disposed over the semiconductor substrate; a plurality of quantum dots disposed over the tunnel oxide layer; and an ONO sandwich structure disposed over the plurality of quantum dots; wherein the ONO sandwich structure comprises:
a first oxide layer disposed above the plurality of quantum dots,a nitride layer disposed above the first oxide layer, anda second oxide layer disposed above the nitride layer, wherein the second oxide layer is thicker than the first oxide layer.