| 发明名称 | Semiconductor apparatus | ||
| 摘要 | A semiconductor apparatus includes a command decoding unit configured to decode an internal command, an internal clock and an internal clock enable signal, and generate an internal control signal; a clock enable signal control unit configured to receive a pre-clock enable signal and output one of the pre-clock enable signal and an enabled internal clock enable signal as the internal clock enable signal in response to a first test signal; an enable signal selection unit configured to output one of the pre-clock enable signal and a second to test signal as a counting enable signal in response to the first test signal; and a counting unit configured to perform a counting operation during an enable period of the counting enable signal, and output a counting code. | ||
| 申请公布号 | US9435851(B2) | 申请公布日期 | 2016.09.06 |
| 申请号 | US201414567853 | 申请日期 | 2014.12.11 |
| 申请人 | SK HYNIX INC. | 发明人 | Jeong Chun Seok |
| 分类号 | H03K3/00;G01R31/28;H03K3/03 | 主分类号 | H03K3/00 |
| 代理机构 | William Park & Associates Ltd. | 代理人 | William Park & Associates Ltd. |
| 主权项 | 1. A semiconductor apparatus comprising: a command decoding unit configured to decode an internal command, an internal clock and an internal clock enable signal, and generate an internal control signal; a clock enable signal control unit configured to receive a pre-clock enable signal and output one of the pre-clock enable signal and an enabled internal clock enable signal as the internal clock enable signal in response to a first test signal; an enable signal selection unit configured to output one of the pre-clock enable signal and a second test signal as a counting enable signal in response to the first test signal; and a counting unit configured to perform a counting operation during an enable period of the counting enable signal, and output a counting code. | ||
| 地址 | Icheon-Si KR | ||