| 摘要 |
An amplifier, particularly a CMOS amplifier has a differential input (1, 2) which is fed to six differential pairs (P1/P2, P3/P4, P5/P6, N1/N2, N3/N4, N5/N6). The outputs of the first (P1/P2) and third (P5/P6) are combined and fed to inputs (10/11) of a summing network (9), while the outputs of the fourth (N1/N2) and fifth (N3/N4) are combined and fed to inputs (12/13) of the network (9). The second (P3/P4) and sixth (N5/N6) pairs are arranged to cancel the tail currents of the fifth (N5/N6) and third (P5/P6) pairs respectively when all the devices are in their active state. Thus regardless of the common mode input level with respect to the supply rails the output current is provided by four devices giving an constant gm and slew rate. |
