| 摘要 |
<p>PURPOSE:To reduce the number of transmission line and to ecomonically constitute lines by using the same transmission line to transmit and receive a clock signal and a frame signal. CONSTITUTION:Clocks corresponding to the period of the frame signal out of a clock train of the clock signal are eliminated to generate a frame- superposed clock signal. This frame-superposed clock signal is delayed in a voltage controlled delay circuit 1 by about one clock. A rise detecting circuit 2, a fall detecting circuit 3, a set/reset type flip-flop 4, and a low-pass filter 5 are operated to suppress the change of the extent of delay. In case of reproducing of the clock signal, the framesuperposed clock signal and the frame- superposed clock signal delayed by one clock are inputted to an OR gate 6 to compensate clocks. In case of reproducing of the frame signal, the frame- superposed clock signal and the clock signal reproduced by the OR gate 6 are inputted to a frame reproducing circuit 7 to detect breaks of the frame- superposed clock signal.</p> |
