| 摘要 |
PURPOSE:To shorten the time required for a read modified write operation by transmitting a memory write request in a read modified write state and before the result is decided for a multi-error detecting action of an R-ECC (read data-only ECC circuit). CONSTITUTION:A memory write request is transmitted to a main storage device 11 from a memory controller 20 before the result is decided for a multi-error detecting action of an R-ECC 23 which is carried out in a read modified write state. Then the write data and the multi-error detecting result of the R-ECC 23 to the storage device 11 in the next cycle. Therefore a DRAM (dynamic RAM) control circuit 14 kept in a state set before output of a CAS (column address strobe) signal cancels the output of the CAS signal. Thus the memory write request produces no operation. As a result, the time required for a read modified write operation can be shortened by one cycle. |
