| 摘要 |
PROBLEM TO BE SOLVED: To correct the phase difference between clock signals to each other when clock trees the clock signals of which are different are propagated and to prevent an error latch due to clock skew. SOLUTION: Data for phase difference correction is inputted as data S101 when a phase difference correction mode S100 becomes effective, and a data comparing part 109 compares data S106 synchronized with a first clock signal S103, data S107 synchronized with a third clock signal S110 and data S108 synchronized with the first clock signal S103. The comparing part 109 decides whether first to third data flip-flops 106 to 108 correctly latch data from the values of the data S106 to S108, makes the data flip-flops 106 to 108 correctly latch the data by changing the delay quantity of a variable delay line 110 and corrects a phase difference by fixing the delay quantity when the data flip-flops 106 to 108 correctly latch the data. |
