| 摘要 |
At a time Tp when a wafer W is transferred into either a load lock chamber LL 1 or LL 2 , periods PSL for the load lock chambers LL 1 and LL 2 to get ready to permit a transfer of a next wafer W thereinto are calculated based on a timing for exchange of wafers W between the load lock chamber LL 1 or LL 2 and a loader module LM. When the periods PSL are calculated, a loader arm LA 1 or LA 2 selects a next wafer W having the shortest period to get ready to be transferable into the load lock chamber LL 1 or LL 2 , from load ports LP 1 to LP 3 . This improves transfer delay in a cluster tool provided with the load lock chambers.
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