发明名称 CELL INFLOW CONTROL CIRCUIT
摘要 <p>PURPOSE:To obtain an efficient cell inflow control circuit of simple constitution without periodical subtracting operation of a memory for cell counter by providing a subtracting counter, a cell memory, and the cell inflow control circuit. CONSTITUTION:This system consists of a delay circuit 1, a selector 2, a cell inflow control circuit 3, a subtracting counter 4 where the counted value counted up by one in each cell subtraction period is held for each call, a cell memory 5 where the number of cells flowing into a network is stored for each call, a cell inflow quantity gathering circuit 6, and a subtracting memory 7 where a subtraction multiple of each call is stored. The value of the subtracting counter 4 is subtracted from the value of the cell counter 5 at each time of cell inflow, and the cell is abandoned when the subtraction result value is equal to or larger than a certain value, but the cell is permitted to pass through when it is smaller than the certain value. Thus, the cost and the power consumption of the system are reduced because the operation speed of the memory where the number of cells is held is reduced.</p>
申请公布号 JPH04156138(A) 申请公布日期 1992.05.28
申请号 JP19900280882 申请日期 1990.10.19
申请人 FUJITSU LTD 发明人 TACHIBANA TETSUO;IWABUCHI EISUKE
分类号 H04Q3/52;H04L12/813;H04Q11/04 主分类号 H04Q3/52
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