发明名称 EMITTER FOLLOWER CIRCUIT
摘要 PURPOSE:To obtain a large output current even when an input bias current is small, and to reduce chip area by constituting a circuit whose input bias current is small by using a current mirror circuit. CONSTITUTION:The current amplification factors of transistors TR 9 and 10 are both set to beta equally and the input and output currents of the mirror circuit consisting of TRs 11 and 12 are set to IB10 equally. Then, an input bias current IB and output current I0 at an input terminal 1 and an output terminal 2 are in relation I0=beta<2>.IB, so the input bias current is one over the integral of the current amplification factor of the TRs 9 and 10 and becomes less than the input current. Further, only one base emitter voltage of a TR is necessary between the input terminal 1 and output terminal 2, and even if the potential at the input terminal 1 drops, an output waveform is hard to distort. Furthermore, the TRs 9 and 10 of an output stage are NPN type TRs, so the chip area is reduced.
申请公布号 JPS60102004(A) 申请公布日期 1985.06.06
申请号 JP19830210322 申请日期 1983.11.09
申请人 NIPPON DENKI KK 发明人 KIOKA RIYUUICHI;ISHII HIDEKAZU
分类号 H03F3/34;H03F3/347;H03F3/50 主分类号 H03F3/34
代理机构 代理人
主权项
地址