发明名称 BUILT-IN ARRAY TYPE SELF-TEST SYSTEM
摘要 PURPOSE: To provide an array incorporated self test system which conduct a test on an element with a fault in an array and exchanges the element after the array terminates mounting a chip formed on the array in a module and which is improved in the semiconductor chip. CONSTITUTION: Circuits 32, 26, 28 and 30 detecting the position of the element with the fault in the memory array 12, a register 34 for storing the address of the element with the fault and an electric fuse 38 fused in response to the binary number of an address stored in the register when an enable signal from single input is applied to the semiconductor chip are provided. The enable signal passes through a logic circuit on the chip and it cannot program and fuse the fuse unless the enable signal exists. An address decoder 40 connected to the output from the fuse uses the redundant element instead of the element with the fault.
申请公布号 JPH0684393(A) 申请公布日期 1994.03.25
申请号 JP19930000102 申请日期 1993.01.04
申请人 INTERNATL BUSINESS MACH CORP <IBM> 发明人 ROBAATO DEIIN ADAMUSU;HENRII OOGASUTO BONGISU ZA SAADO;JIEEMUZU UIRIAMU DOOSON;ERITSUKU RII HEDOBERUGU
分类号 G11C29/00;G11C29/12;G11C29/44;(IPC1-7):G11C29/00 主分类号 G11C29/00
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