发明名称 Output circuit for gunning transceiver logic
摘要 In a GTL circuit for restraining a ringing occurred by parasitic active elements on a package and a transmission path, the GTL circuits comprises two NMOS transistors connected in series to each other, for restraining a ringing between the gate and drain of an open drain type NMOS transistor which drives an output potential, and a plurality of delay circuits connected in series, for controlling periodically a current flowing through the two NMOS transistors, thereby reducing the ringing exceedingly the ringing caused by extremely large inductive elements which are connected to an output terminal as loads, and achieving a high speed operation of the GTL circuit.
申请公布号 US5563542(A) 申请公布日期 1996.10.08
申请号 US19950532986 申请日期 1995.09.22
申请人 NEC CORPORATION 发明人 WATARAI, SEIICHI
分类号 H03H11/26;H03H11/30;H03K17/687;H03K19/003;H03K19/0175;H03K19/0185;(IPC1-7):H03K17/16 主分类号 H03H11/26
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