METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

摘要

PURPOSE: A manufacturing method of a semiconductor element is provided to increase operation speed and improve element reliability by reducing signal delay time of gate electrode and removing hot carrier trap. CONSTITUTION: A determined thickness of gate electrode(22) is formed on a semiconductor plate(20). A low concentration junction region(23a) is formed on the semiconductor plate(20) by low concentration ion implantation. A first insulation layer is formed on the entire structure. The first insulation layer is etched to form a side wall spacer(24) of the first insulation layer at the side of the gate electrode(22). A high concentration junction region23b) is formed at the low concentration junction region(23a) to form an LDD(lightly doped drain) junction region(23b), with high concentration ion implantation. A second insulation layer is formed on the entire structure. The second insulation layer is polished until the gate electrode(22) is exposed and it is polished more until the top of the side wall spacer(24) is exposed. The first insulation layer is removed with wet etching to change the side wall spacer(24) into void hole. The entry of the hole is welded for the inside of the hole(24) to be filled with air, with fast deposition.