发明名称 |
HIGH SPEED DIGITAL DATA RETIMING DEVICE |
摘要 |
PURPOSE: An apparatus for re-timing high-speed digital data is provided to re-time data without loss of the data by providing the apparatus for re-timing high-speed digital data having large range for input allowable jitter. CONSTITUTION: A clock pulse generator(100) generates n multiple delay clock pulses having n phases. A transition detector(200) generates and outputs data transition detection signals which select one or more clock pulses where transition is generated. A data transition detection signal monitor(300) monitors the data transition detection signal and generates a clock pulse control signal. A D flipflop(500) re-times the serial data inputted form exterior to the clock pulse mixed by a clock pulse mixer(400). A re-timing buffer(600) re-times the re-timed data to the clock from exterior to synchronize and output it with external clock.
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申请公布号 |
KR100258086(B1) |
申请公布日期 |
2000.06.01 |
申请号 |
KR19970058844 |
申请日期 |
1997.11.07 |
申请人 |
KOREA TELECOM CORP.;KOREA ELECTRONICS & TELECOMMUNICATIONS RESEARCH INSTITUTE |
发明人 |
JUNG, HEE YOUNG;PARK, KYUN CHEL;NA, JI HA;LEE, BYUM CHEL |
分类号 |
H03K5/135;(IPC1-7):H03K5/135 |
主分类号 |
H03K5/135 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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