发明名称 DATA PROCESSOR
摘要 <p>PROBLEM TO BE SOLVED: To prevent the deterioration of efficiency in data transfer by preventing an input/output mechanism which cannot receive transmission permission from waiting for a path to become idle and carrying forward a transmission request addressed to the other input/output mechanism and giving the request when the requests of data transfer are simultaneously given to one specified mechanism from the plural input/output mechanisms. SOLUTION: When the requests of data transfer are simultaneously given to one specified mechanism from plural input/output mechanisms, the input/ output mechanism which cannot receive transmission permission does not wait for the path to become idle but the transmission request addressed to the other input/output mechanism is carried forward and is given. When the transmission requests are simultaneously given to a port N from the other ports in the device, an arbitrator 15 permits transmission only to one transmission request. When the transmission request to the port except for the port N is given, a transmission queue 12 gives the transmission request to the other port based on path use information. The arbitrator 15 executes arbitration again to the transmission request and selects the transmission port.</p>
申请公布号 JP2000286860(A) 申请公布日期 2000.10.13
申请号 JP19990091271 申请日期 1999.03.31
申请人 HITACHI LTD;HITACHI INFORMATION TECHNOLOGY CO LTD 发明人 ADACHI SHUICHI;HATANAKA SATOSHI
分类号 G06F15/173;H04L12/28;H04L12/931;H04L12/933;H04L12/937;(IPC1-7):H04L12/28;H04L12/56 主分类号 G06F15/173
代理机构 代理人
主权项
地址