发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PROBLEM TO BE SOLVED: To improve reliability of a non-volatile semiconductor ensuring operation margin by narrowing distribution width of a threshold voltage (Vtm) of a memory cell after erasure, also by preventing the occurrence of over-erasure. SOLUTION: This memory is provided with reference cells 113, 114, having cell structure being equivalent to a memory cell 106 of a main body side. When batch erasure is conducted on an erasure block of a memory cell array 107, voltage dropped from erasure voltage of the memory cell of the body side by a prescribed value and voltage raised by the prescribed values are applied respectively. Control is performed, so that threshold of the reference cells 113, 114 are in the prescribed range after the erasure. Thereby, verification is not required for all memory cells, and also the occurrence of over-erasure can be prevented.</p>
申请公布号 JP2002015586(A) 申请公布日期 2002.01.18
申请号 JP20000196708 申请日期 2000.06.29
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 HONNA KOICHI
分类号 G11C16/04;(IPC1-7):G11C16/04 主分类号 G11C16/04
代理机构 代理人
主权项
地址