| 摘要 |
PROBLEM TO BE SOLVED: To provide a method for forming a contact hole and a spacer capable of preventing a contact failure due to a mask misalignment, preventing void occurrences in an interlayer insulation film of an adjacent conducive patterns and reducing a parasitic capacitance between semiconductor devices. SOLUTION: The method comprises a first step for forming a plurality of conductive film patterns 81 on a substrate 80, a second step for forming an interlayer insulation film 84 on an entire structure after the first step completion, a third step for exposing a contact region between the adjacent conductive patterns by selectively etching the interlayer insulation film and a fourth step for forming an insulation film spacer 86 on a side wall of the conductive film pattern exposed in the third step.
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