| 摘要 |
<p>A hard-decision iteration decoding based on an error-correction code having a low undetectable error probability is provided to determine a corrected sequence of a transmitted symbol by decoding a sequence of received symbols after performing hard-decision for an intrinsic characteristic of the transmitted symbol. A hard-decision iteration decoding based on an error-correction code having a low undetectable error probability includes a trellis decoder circuitry(102), an order restoring circuitry, a reed-solomon error detection and correction circuit(106), and a reordering circuitry. The trellis decoder circuitry(102) processes encoded data according to a path part of at least one trellis. The order restoring circuitry is configured to recover an order of symbols in the encoded data, and is connected to an output of the trellis decoder circuitry(102). The reed-solomon error detection and correction circuitry(106) is connected to an output of the order restoring circuitry to process a block-based error correction code in data from a factor graphic circuitry to correct and detect an error in the encoded data. The reordering circuitry reorders hard-decision from the error detection and correction circuitry(106) and provides the reordered hard-decision output to the trellis decoder circuitry(102).</p> |
