CLOCK TIMING READJUSTING CIRCUIT AND METHOD FOR READJUSTING AND MATCHING TIMING OF VIDEO CLOCK INPUT SIGNAL WITH HORIZONTAL SYNCHRONIZING SIGNAL

摘要

PROBLEM TO BE SOLVED: To provide a clock timing re-adjusting device which is provided with a delay element indicating a comparatively wide propagating delay fluctuation and is suitable for the configuration by the form of an integrated circuit. SOLUTION: A video clock input signal is supplied to a delay line 30 consisting of the plural delay elements T1-T19 and plural delayed clock signals are supplied to the taps T1-T15 of the delay line. Then, a selecting circuit 6 responds to a horizontal synchronizing signal HS, coupling is executed with the selected one of the taps as an output and a delayed output clock signal YCK with the coincidence of an end edge part with the signal HS is generated. In order to reduce the number of the taps required for obtaining min. whole delay concerning the delay element, where min. delay resolution is obtained and also delay is fluctuated at every integrated circuit, the taps in first group T1-T13 are separated for the portion of one delay element in interval and at least one delay element of the second group T13-T16, T17-T18 and T19 is separated for the portion of more than one delay element in interval.