| 摘要 |
A strained Si layer 2 is epitaxially grown on a base SiGe layer 1, and a gate insulating film 3a and a gate electrode 4a are formed. An impurity is then ion-implanted (FIG. 2A) into the base SiGe layer 1 and the strained Si layer 2 using the gate electrode 4a as a mask, heat treatment is performed for activation, and a source/drain region 6 is formed (FIGS. 2B and 2C). In this instance, the film thickness of the strained Si layer 2 is set to 2Tp, where Tp (=Rp) is the depth having the maximum concentration of the impurity in the source/drain region 6 of the finished MISFET.
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