SELF-ALIGNED CONTACT PROCESS ENABLED BY LOW TEMPERATURE

摘要

Self-aligned contacts of a semiconductor device are fabricated by forming a metal gate structure on a portion of a semiconductor layer of a substrate. The metal gate structure contacts inner sidewalls of a gate spacer. A second sacrificial epitaxial layer is formed on a first sacrificial epitaxial layer. The first sacrificial epitaxial layer is adjacent to the gate spacer and is formed on source/drain regions of the semiconductor layer. The first and second sacrificial epitaxial layers are recessed. The recessing exposes at least a portion of the source/drain regions. A first dielectric layer is formed on the exposed portions of the source/drain regions, and over the gate spacer and metal gate structure. At least one cavity within the first dielectric layer is formed above at least one of the exposed portions of source/drain regions. At least one metal contact is formed within the at least one cavity.

主权项

1. An integrated circuit comprising:
at least one semiconductor device, the at least one semiconductor device comprising:
a substrate;a semiconductor layer formed on the substrate;a metal gate structure formed on a portion of the semiconductor layer;a gate spacer formed on the metal gate structure;a first epitaxial layer formed on source/drain regions of the semiconductor layer and adjacent to the gate spacer;a second epitaxial layer formed on a top surface of the first epitaxial layer;a dielectric layer formed between and in contact with a first inner sidewall of the second epitaxial layer and a second inner sidewall of the second epitaxial layer, wherein the dielectric layer is further formed above and in contact with the metal gate structure; andat least one self-aligned metal contact formed on at least one of the source/drain regions.