Integrated Semiconductor Device And Wafer Level Method Of Fabricating The Same

摘要

The present disclosure provides one embodiment of a stacked semiconductor device. The stacked semiconductor device includes a first substrate; a first bond pad over the first substrate; a second substrate including a second electrical device fabricated thereon; a second bond pad over the second electrical device over the second substrate, the second bond pad electrically connecting to the second electrical device; a second insulation layer over the second bond pad having a top surface, the second insulation layer being bonded toward the first bond pad of the first substrate; and a through-substrate-via (“TSV”) extending from a surface opposite to the first bond pad through the first substrate and through the top surface of the second insulation layer to the second bond pad.

主权项

1. A device comprising:
a first semiconductor substrate having a first side and an opposing second side; a first electrical device embedded in the first semiconductor substrate adjacent the first side of the semiconductor substrate; a first bonding pad disposed over the first side of the first semiconductor substrate, wherein the first bonding pad is electrically coupled to the first electrical device; a second semiconductor substrate having a third side and an opposing fourth side; a second bonding pad disposed over the third side of the second semiconductor substrate, wherein the first and second semiconductor substrates are bonded together via the first bonding pad and the second bonding pad such that the first side of the first semiconductor substrate faces the third side of the second semiconductor substrate; and a through-substrate-via (“TSV”) extending from the second side of the first semiconductor substrate to the first bonding pad, wherein the TSV includes a trench extending from the second side of the first semiconductor substrate to the first bonding pad and a metal material layer disposed within the trench.