发明名称 PLL CIRCUIT AND CONTROL METHOD THEREOF
摘要 PROBLEM TO BE SOLVED: To provide a PLL circuit capable of generating a high accuracy oscillation signal by reducing phase offset, and to provide a control method therefor.SOLUTION: A PLL circuit includes a phase comparator 13, a pulse width control section for adjusting the width of pulses of the comparison results UP, DP from the phase comparator 13, and outputting the comparison results UPp, DNp and the comparison results UPi, DNi of shorter pulse width, a charge pump 14 outputting a current Ip in accordance with the comparison results UPp, DNp, a charge pump 15 outputting a current Ii in accordance with the comparison results UPi, DNi, a filter 16 outputting a control voltage Vp by removing the high frequency components of a voltage generated based on the current Ip, a filter 17 outputting the integration result of the current Ii as a control voltage Vi, and a voltage controller 18 generating an oscillation signal of a frequency in accordance with the control voltages Vp, Vi.SELECTED DRAWING: Figure 1
申请公布号 JP2016152573(A) 申请公布日期 2016.08.22
申请号 JP20150030303 申请日期 2015.02.19
申请人 RENESAS ELECTRONICS CORP 发明人 HIRAI YOSHINORI
分类号 H03L7/08;H03L7/093 主分类号 H03L7/08
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