| 摘要 |
<p>In a data encoding/decoding circuit, a data encoding circuir (100) includes a first clock (111), a first time setting circuit (112), a first random number generator (113), and a converter (114) for receiving transmission data and converting the transmission data into output data with frame sync signals. A data decoding circuit (200) includes a second clock (211), a second time setting circuit (212), a frame sync extracting circuit (216), a time correction circuit (213) for correcting the time of the second clock, a second random number generator (214), and an inverter (215) for inverting output data from the frame sync extracting circuit with a random number from the second random number generator and outputting the inverted data as decoded data.</p> |
