发明名称 OUTPUT STAGE CIRCUIT
摘要 PURPOSE:To improve the output sink current capability by connecting a switch turned off/on in response to the high/low level of an output node between a base and an emitter of a transistor (TR) of the first stage of Darlington structure so as to keep the output saturated voltage at a low current region lower. CONSTITUTION:A switch comprising a TRQ4 is connected between the baseemitter of a TR Q1 in TRs Q1, Q3 of the Darlington structure and a voltage in response to the output saturated voltage VOL is impressed to the base of the TR Q4. When a sink current LOL of an output 3 is increased, the emittercollector voltage of the TR Q3 is increased and a potential at a node Nb rises. When the voltage at the node Na rises and reaches an ON-voltage VBE1+VBE3, the TR Q1 is turned on and the TR Q4 is turned off. Thus, the output saturated voltage at a low current region is kept lower and the output sink current capability is increased.
申请公布号 JPS62264706(A) 申请公布日期 1987.11.17
申请号 JP19850118206 申请日期 1985.05.31
申请人 FUJITSU LTD 发明人 MATSUYAMA TOSHIYUKI
分类号 D03C7/06;D03C7/00;H03F3/34;H03F3/343 主分类号 D03C7/06
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