发明名称 |
Digital transmission system comprising a double synchronising loop |
摘要 |
<p>The transmission system (10) includes a receiving appts. (14) with a demodulating circuit (110) and processing circuit (120). A synchronising device (16) synchronises the carrier to estimate and compensate for synchronisation faults. The synchronising device includes a first loop (1) for phase and frequency correction and a second loop (2) for phase correction with first and second error signals produced respectively by the loops. The error signals are filtered. Their operation is controlled by a mode detector (130) by which the latched or unlatched status is determined. The second loop mixes the phase correction signal with a demodulated signal.</p> |
申请公布号 |
EP0698970(A1) |
申请公布日期 |
1996.02.28 |
申请号 |
EP19950202182 |
申请日期 |
1995.08.10 |
申请人 |
LABORATOIRES D'ELECTRONIQUE PHILIPS S.A.S.;PHILIPS ELECTRONICS N.V. |
发明人 |
MARTINEZ, GEORGES;GUILLAUD, JEAN-MICHEL |
分类号 |
H04L7/00;H03L7/087;H04L7/033;H04L27/227;H04L27/38;(IPC1-7):H03L7/087 |
主分类号 |
H04L7/00 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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