| 摘要 |
A solid state circuit breaker for use in electronic devices which may be connected to an active computer bus. In one embodiment the solid state circuit breaker includes a digital to analog converter by way of which digital control signals are used to set the value at which the circuit breaker determines that a fault condition exists. Fault time is measured from when the fault condition is detected, and when the fault time exceeds a predetermined value, the circuit breaker opens, thereby preventing current flow through the circuit breaker for a second predetermined amount of time. Once this second predetermined amount of time elapses, the circuit breaker again permits current flow, and if a fault condition is determined to continue to exist, the cycle is repeated. The circuit breaker also includes a current limiting portion which restricts current flow to a maximum permissible value should the current flowing through the circuit breaker attempt to exceed this maximum permissible value. A reverse voltage comparator circuit interrupts current flow through the circuit breaker if the voltage at the output terminal of the circuit breaker exceeds the voltage at the input terminal of the circuit breaker.
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