发明名称 MANUFACTURING PROCESS FOR BORDERLESS VIAS
摘要 <p>An improved manufacturing process and a improved device made by the process are described for forming via interconnects between metal layers in a multi-level metallization structure. An insulating cap layer (54) is deposited on the patterned and etched metal layer (6) before depositing the interlevel dielectric layer (15) above it. A two-step via etch process selectively removes portions of the cap layer (54) within vias prior to via fill.</p>
申请公布号 WO1997028563(A1) 申请公布日期 1997.08.07
申请号 US1996016539 申请日期 1996.10.16
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