发明名称 MULTIPLIER AND INTEGRATED CIRCUIT DEVICE HAVING THE SAME
摘要 PROBLEM TO BE SOLVED: To provide a multiplier having a complete tree of 4-2 compressors structured by signed multiplication. SOLUTION: In a signed multiplier having partial products structured by secondary booth decoding, a booth selector part 101 is provided with a partial- product correcting circuit 103 for correcting the partial products by using a booth decoding output as an input. This reduces the number of partial products and makes it possible to conduct partial product addition of a two-piece tree structure by the 4-2 compressors 104. Carry propagation addition 105 is made to the result of the partial product addition to provide the result of multiplication. Since a complete two-piece tree of 4-2 compressors can be structured especially with 8 bits, 16 bits, and 32 bits, speeding up can be made by a difference in delay time between a two-stage series 3-2 adder and the 4-2 compressors as compared with a conventional structure using a 3-2 adder.
申请公布号 JP2002157114(A) 申请公布日期 2002.05.31
申请号 JP20000357617 申请日期 2000.11.20
申请人 HITACHI LTD 发明人 YAMADA TETSUYA;ARAKAWA FUMIO;NAGATA KENJI
分类号 G06F7/533;G06F7/52;G06F7/53 主分类号 G06F7/533
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