发明名称 TESTER FOR SEMICONDUCTOR IC
摘要 PROBLEM TO BE SOLVED: To solve a problem in the conventional tester of semiconductor ICs that simple operation of testing is hindered by the necessity of generating a control program of the processor for the generation of a test signal from the processor to be mounted on a substrate along with the need for a peripheral circuit such as memory. SOLUTION: This apparatus is constituted of an address control means for generating an address 113, an access control means for controlling logic circuits or memory circuits cyclically, a control signal generation means for generating control signals 408, 508 and 608 at each cycle, a data control means which generates a data 308 for inputting a test pattern to the logic circuits or the memory circuits by switching two internal register data according to an address data outputted from the address control means or the lower one bit of the address data, and an error detection means which judges the propriety and transmits an error detection output 712.
申请公布号 JP2002202351(A) 申请公布日期 2002.07.19
申请号 JP20010000148 申请日期 2001.01.04
申请人 YASKAWA ELECTRIC CORP 发明人 KOGA HIDETSUGU
分类号 G01R31/28;(IPC1-7):G01R31/28 主分类号 G01R31/28
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