发明名称 MEMORY
摘要 <p>A memory having a plurality of banks (BNKA, BNKB, BNKC, BNKD) each having a plurality of memory cells for storing data, and a plurality of bit lines for reading out data from the plurality of memory cells. The plurality of banks have bit lines of equal length.</p>
申请公布号 WO2004081946(A1) 申请公布日期 2004.09.23
申请号 WO2003JP02832 申请日期 2003.03.11
申请人 FUJITSU LIMITED;TANIGUCHI, NOBUTAKA;HATAKEYAMA, ATSUSHI;IKEDA, TOSHIMI;KIKUTAKE, AKIRA;KAWABATA, KUNINORI;TAKEUCHI, ATSUSHI 发明人 TANIGUCHI, NOBUTAKA;HATAKEYAMA, ATSUSHI;IKEDA, TOSHIMI;KIKUTAKE, AKIRA;KAWABATA, KUNINORI;TAKEUCHI, ATSUSHI
分类号 G11C8/12;G11C7/18;G11C16/06;G11C16/08;G11C16/24;(IPC1-7):G11C16/06;G06F12/00;G06F12/06 主分类号 G11C8/12
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