发明名称 REEDAHYOJISOCHONOBIDEOSHORIKAIRO
摘要 <p>PURPOSE:To obtain a video processing circuit for radar display device in which the visibility of target video is improved. CONSTITUTION:A video signal and a weather video signal are compared with a predetermined level by detectors 11, 12, and these comparison signals are ANDed by an AND gate 13. The AND signal is used as the address signal of a lookup table 14 together with the video signal. In the table 14, an output signal of the address signal is previously stored. Accordingly, the display mode of the video signal is altered for the presence or absence of the AND signal in the configuration of the video output signal for the address signal, thereby identifying and displaying the superposition of the target video and a weather video from the nonsuperposition.</p>
申请公布号 JP2639351(B2) 申请公布日期 1997.08.13
申请号 JP19940192965 申请日期 1994.08.17
申请人 NIPPON DENKI KK 发明人 HIGUCHI TOSHIMITSU
分类号 G09G5/00;G01S7/06;G01S7/295;G01S13/95;G09G5/10;(IPC1-7):G01S13/95 主分类号 G09G5/00
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