发明名称 Method and apparatus for self-adjusting input delay in DDR-based memory systems
摘要 A method and apparatus are provided for interfacing with a synchronous dynamic memory in which memory commands are provided to the memory. The memory is accessed in response to the memory commands. Read data is captured in a data capture circuit having a delay setting. The delay setting is updated in response to detection of a period of read inactivity of the memory.
申请公布号 US7366862(B2) 申请公布日期 2008.04.29
申请号 US20040987356 申请日期 2004.11.12
申请人 LSI LOGIC CORPORATION 发明人 NYSTUEN JOHN M.;EMERSON STEVEN M.;AURACHER STEFAN
分类号 G06F12/00;G11C7/22 主分类号 G06F12/00
代理机构 代理人
主权项
地址