发明名称 Test unit for rapid transfer signal line - has address generator and signal combiner leading to a comparator
摘要 <p>The test circuit relates to the testing of circuit networks worh a number of signal inputs, especially for a rapid storage device, and which has at least one signal output. A signal combiner passes the input string to a smoothing circuit, and this is followed by a comparator to regulate the level of the signals for the "O" and "1" signal pulses. Following the comparator is an intermediate store which is connected with a digital comparator, and this is in turn regulated by pulse oscillator. Provision is made to extend the output circuit to accommodate a number of parallel data exit lines connected with the same control circuit.</p>
申请公布号 DE2516973(A1) 申请公布日期 1976.10.28
申请号 DE19752516973 申请日期 1975.04.17
申请人 PHILIPS PATENTVERWALTUNG GMBH 发明人 JACOBI,PETER,ING.
分类号 G11C29/20;G11C29/50;(IPC1-7):11C29/00;11C17/00;03K13/32 主分类号 G11C29/20
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