发明名称 Electrically programmable MOS read-only memory with isolated decoders
摘要 A programmable and erasable MOS read-only memory employing floating gate memory cells. Unique, compact decoders allow the high voltage programming signal to be fully decoded without exposing the decoding transistors to the high voltage. The memory employs field-effect transistors having four different voltage thresholds. One such device is employed in the sense amplifiers to provide compensation for process variations and another device is used to allow the output buffers to be readily "powered-down".
申请公布号 US4094012(A) 申请公布日期 1978.06.06
申请号 US19760728789 申请日期 1976.10.01
申请人 INTEL CORPORATION 发明人 PERLEGOS, GEORGE;SALSBURY, PHILLIP J.
分类号 G11C11/34;G11C16/08;G11C16/12;G11C16/20;G11C16/26;(IPC1-7):G11C11/40;G11C7/00 主分类号 G11C11/34
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