发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To improve a circuit device of this design in the degree of integration by a method wherein a collector and an emitter of a forward type and a reverse type bipolar transistor formed on a protrudent island region in a depthwise direction are formed into one piece. CONSTITUTION:An output stage of an Active Pull Down Non threshold Logic used in a large scale computer is constituted as follows: a forward type pull down bipolar transistor(Tr) Q6 is provided to a protrudent island region 5; the island region 5 is formed of an n<->-type epitaxial layer 2, and TrQ6 has such a longitudinal structure that an n-type emitter E, a p-type base B, and an n-type collector C are deposited in a depthwise direction of the island region 5; a reverse type emitter follower bipolar TrQ5 is structured in such a manner that an n-type collector C, a p-type base B, and an n-type emitter E are successively formed in a depthwise direction of the island region 5; and the collector or TrQ5 and the emitter of TrQ6 are formed into one piece. By this setup, an element isolating region can be dispensed with, so that the degree of integration can be improved.
申请公布号 JPH0278267(A) 申请公布日期 1990.03.19
申请号 JP19880228662 申请日期 1988.09.14
申请人 HITACHI LTD 发明人 KOYUI KAORU
分类号 H01L29/73;H01L21/331;H01L21/8222;H01L27/06;H01L27/082;H01L29/732 主分类号 H01L29/73
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