| 摘要 |
<p>The present invention has as an objective providing a silicon epi-wafer, and a manufacturing method therefor, which simplifies processing as much as possible in an attempt to lower the cost of an epi-wafer, and which is capable of manifesting a sufficient IG effect even in low-temperature device fabrication processing of under 1080 DEG C in an epi-wafer, and furthermore, in device processing, which enhances gettering capabilities for a variety of impurities in wafer device processing, without performing, following wafer slicing, any process from which an EG effect can be anticipated. As for the silicon single crystal, which is grown via the CZ method so as to make the oxygen concentration relatively high, and to intentionally make the carbon concentration high, outstanding gettering capabilities are manifested in the wafer itself, without performing EG processing. And, in accordance with suitably controlling oxygen concentration and carbon concentration while pulling a single crystal, and performing short-duration annealing at a low temperature after silicon wafer slicing, Äthe present inventionÜ, in addition to furnishing IG capabilities, is capable of reducing the number of processes by not performing any of the various complex EG processes performed following conventional silicon wafer formation, strives to lower costs, makes possible the granting of IG capabilities, which are generated in low-temperature device processing that uses an epi-wafer, and, since EG is not needed even when two-side mirror finishing is required to realize high-precision planarity, makes possible the manufacture of a substrate capable of measures designed to increase precision. <IMAGE></p> |
