CONTACT STRUCTURE FOR SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF

摘要

PURPOSE: A contact structure for a semiconductor device and a manufacturing method thereof are provided to secure an overlap margin between a contact pad and a conductive layer contact in a case of misalignment in a formation of a contact. CONSTITUTION: A gate structure patterned on a semiconductor substrate(200) includes a gate electrode having a polysilicon layer(234) and a silicide layer(233), and a capping insulation layer having a silicon nitride layer(235) and a silicon oxide layer(236). In particular, the silicon oxide layer(236) in a peripheral or logic region(202) is removed when an n-type impurity is implanted to form an NMOS transistor. Furthermore, the silicon nitride layer(235) in the peripheral or logic region(202) is also removed when a p-type impurity is implanted to form a PMOS transistor. Therefore, though misalignment occurs in the subsequent process for forming a contact, a bit line contact in a cell region(201) stops at the silicon nitride layer(235) on the top of the gate structure. In addition, a metal contact in the peripheral or logic region(202) is stably made on the gate structure.