摘要 |
<p>PURPOSE:To decrease dispersion in a DFT(Discrete Fourier Transform) arithmetic output depending on a time window and a phase of an input signal by providing an interpolation limiter binarizing the input signal. CONSTITUTION:An interpolation limiter 14 is provided in a DFT arithmetic system where a DFT arithmetic circuit 3 applies DFT arithmetic operation to a signal being the result of sampling an input signal for a prescribed period and binarizing the signal so as to detect the desired frequency component. The interpolation limiter 14 binarizes the input signal by causing a change in an output signal at a sampling point giving a closest level to a threshold level among levels resulting from a period sampled when the input signal intersects a prescribed threshold level by a period being one over optional integral number of the prescribed sampling period. Thus, the dispersion in the output of the DFT arithmetic circuit of the post-stage caused by a round error on the time axis of the limiter output signal binarizing the input signal is decreased.</p> |