发明名称
摘要 <p>PURPOSE:To form a memory cell of almost one cell transistor by programming a plurality of cell transistors by injecting or emitting electrons to a floating gate through an insulating film. CONSTITUTION:A signal R is set at a level '0$ band a transistor 27 is turned off. Then, signals X1 and W1-W4 are set at a high voltage level and electrons are injected to the floating gates of cell transistors CT1-CT4 through a thin oxide film 33. When the signals W1-W4 are set at 0V and data D outputted from a data input circuit 25 is at a level '1', the transistor 26 is turned on. Then, a high voltage is applied to the drains of the corresponding cell transistors through the transistor 26 and a selective transistor ST from a high voltage power source VP, and electrons are emitted from the floating gate by tunnel effect.</p>
申请公布号 JP2667654(B2) 申请公布日期 1997.10.27
申请号 JP19950138185 申请日期 1995.06.05
申请人 发明人
分类号 G11C17/00;G11C16/02;G11C16/04;H01L21/8247;H01L27/115;H01L29/788;H01L29/792;(IPC1-7):H01L21/824 主分类号 G11C17/00
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